This invention relates to an arrangement for bit-parallel addition of binary numbers in two's complement form.
An arrangement of this general type is known from the book Computer Arithmetic by K. Hwang, John Wiley and Sons, New York 1979, pp. 98-103, particularly FIG. 4.2. Every first adder comprises three inputs that are respectively occupied with equivalent bits of three binary numbers to be added to one another. The sum output terminals of the first adders are connected to first input terminals of a further adder means, and the carry output terminals of the first adders (with the exception of the most significant adder) are connected to second input terminals of the adder means. A sum word appears at the outputs of the latter as the result of the addition. In contrast to an adder arrangement having a ripple carry ("carry-propagate" principle), the carries of all of the first adders are simultaneously formed (in the case of addition of three binary numbers) and are available with the intermediate sum word produced by the first adders. An adder arrangement constructed in this way operates according to what is referred to as the "carry-save" principle.
In a "carry-save" arrangement for the addition of binary numbers in two's complement, an overflow effect that leads to an incorrect result can occur because of the separate representation of the sum supplied by the first adders in the form of an intermediate sum word and of a carry word. Such an error arises when relatively small sum words are formed from larger intermediate sum words, and carry words are formed having opposite operational signs.